Background
The origins of flash memory can be traced back to the development of the floating-gate MOSFET (FGMOS), also known as the floating-gate transistor. The original MOSFET (metal–oxide–semiconductor

Block erasure
One limitation of flash memory is that, although it can be read or programmed a byte or a word at a time in

NOR and NAND flash differ in two important ways:
• The connections of the individual memory cells are different.
• The interface provided for reading and writing the memory is different; NOR allows random access, while NAND allows only

Multiple chips are often arrayed or die stacked to achieve higher capacities for use in consumer electronic devices such as multimedia players or GPSs. The capacity scaling

Flash memory stores information in an array of memory cells made from floating-gate transistors. In single-level cell (SLC) devices, each cell stores only one bit of information. Multi-level cell (MLC) devices, including triple-level cell (TLC) devices, can store more than one bit

The low-level interface to flash memory chips differs from those of other memory types such as DRAM, ROM, and EEPROM, which support bit-alterability (both zero to one and one to zero) and

Because of the particular characteristics of flash memory, it is best used with either a controller to perform wear leveling and error correction or specifically designed flash file systems, which spread writes over the media and deal with the long erase times of NOR flash